使用 Xilinx ZYNQ SoC 和 SDK 进行嵌入式系统设计
7. Profiling
8. Getting started with Interrupts
3. Getting Started with Simple Peripherals GPIO
5. Getting started with Intermediate Drivers Understanding Timers
1. Installing Vivado
11. Path Ahead Building Custom AXI Peripherals for ZYNQ
2. Toolchain Configuration
9. Memory Resources
4. Getting started with Intermediate Drivers UARTPS
6. Software and Hardware Debugging
10. Common Errors
13. Using Interrupts with SCU Timer--_CN.srt
6. Using GPIO Interrupt P3--.srt
17. Using Interrupt with TTC--.srt
7. Code.html
12. Code.html
2. Interrupts.html
10. Code.html
9. Using Multiple Interrupts P2--_CN.srt
1. Agenda--_CN.srt
15. Using Interrupts with WDT--_CN.srt
1. Agenda--.mp4
9. Using Multiple Interrupts P2--.srt
11. Using AXI TImer Interrupt--.mp4
8. Using Multiple Interrupts P1--.mp4
3. Fundamentals of Interrupt Driver--.srt
4. Using GPIO Interrupt P1--.mp4
15. Using Interrupts with WDT--.srt
13. Using Interrupts with SCU Timer--.mp4
11. Using AXI TImer Interrupt--.srt
1. Agenda--.srt
5. Using GPIO Interrupt P2--.srt
8. Using Multiple Interrupts P1--_CN.srt
4. Using GPIO Interrupt P1--_CN.srt
13. Using Interrupts with SCU Timer--.srt
6. Using GPIO Interrupt P3--.mp4
17. Using Interrupt with TTC--.mp4
17. Using Interrupt with TTC--_CN.srt
15. Using Interrupts with WDT--.mp4
9. Using Multiple Interrupts P2--.mp4
3. Fundamentals of Interrupt Driver--_CN.srt
5. Using GPIO Interrupt P2--.mp4
6. Using GPIO Interrupt P3--_CN.srt
14. Code.html
16. Code.html
4. Using GPIO Interrupt P1--.srt
18. Code.html
11. Using AXI TImer Interrupt--_CN.srt
8. Using Multiple Interrupts P1--.srt
3. Fundamentals of Interrupt Driver--.mp4
5. Using GPIO Interrupt P2--_CN.srt
1. Agenda--.mp4
2. Profiling with AXI Timer--.srt
6. Understanding Profiling feature of SDK--.mp4
4. Profiling with 64-bit Global Timer--.srt
2. Profiling with AXI Timer--.mp4
4. Profiling with 64-bit Global Timer--_CN.srt
1. Agenda--.srt
2. Profiling with AXI Timer--_CN.srt
1. Agenda--_CN.srt
5. Code.html
6. Understanding Profiling feature of SDK--.srt
4. Profiling with 64-bit Global Timer--.mp4
3. Code.html
6. Understanding Profiling feature of SDK--_CN.srt
19. Working with PL Timer AXI Timer IP P1--.srt
1. Agenda--_CN.srt
18. Code.html
5. CPU Watchdog Timer P3--_CN.srt
15. TTC in Polled Mode P3--_CN.srt
7. CPU 32-bit Private Timer--_CN.srt
20. Working with PL Timer AXI Timer IP P2--.mp4
19. Working with PL Timer AXI Timer IP P1--_CN.srt
1. Agenda--.srt
15. TTC in Polled Mode P3--.srt
13. TTC in Polled Mode P1--_CN.srt
11. CPU 32-bit Timer Use of Prescalar--.srt
7. CPU 32-bit Private Timer--.mp4
3. CPU Watchdog Timer P1--.mp4
11. CPU 32-bit Timer Use of Prescalar--.mp4
17. TTC and GPIO MIO LED in Polled Mode--.srt
12. Code.html
20. Working with PL Timer AXI Timer IP P2--_CN.srt
4. CPU Watchdog Timer P2--.srt
17. TTC and GPIO MIO LED in Polled Mode--.mp4
21. Code.html
9. CPU 32-bit Timer Use of Auto-reload Mode--.mp4
2. TimersCounters in Zynq Processing System--.mp4
4. CPU Watchdog Timer P2--_CN.srt
13. TTC in Polled Mode P1--.mp4
5. CPU Watchdog Timer P3--.srt
19. Working with PL Timer AXI Timer IP P1--.mp4
9. CPU 32-bit Timer Use of Auto-reload Mode--.srt
3. CPU Watchdog Timer P1--.srt
17. TTC and GPIO MIO LED in Polled Mode--_CN.srt
14. TTC in Polled Mode P2--_CN.srt
20. Working with PL Timer AXI Timer IP P2--.srt
14. TTC in Polled Mode P2--.srt
8. Code.html
15. TTC in Polled Mode P3--.mp4
7. CPU 32-bit Private Timer--.srt
9. CPU 32-bit Timer Use of Auto-reload Mode--_CN.srt
14. TTC in Polled Mode P2--.mp4
13. TTC in Polled Mode P1--.srt
11. CPU 32-bit Timer Use of Prescalar--_CN.srt
6. Code.html
2. TimersCounters in Zynq Processing System--_CN.srt
3. CPU Watchdog Timer P1--_CN.srt
2. TimersCounters in Zynq Processing System--.srt
16. Code.html
1. Agenda--.mp4
4. CPU Watchdog Timer P2--.mp4
5. CPU Watchdog Timer P3--.mp4
10. Code.html
22. Using AXI GPIO IP Single Channel P2--_CN.srt
5. Ways to Communicate data between PS and Peripherals P2--.mp4
4. Ways to Communicate data between PS and Peripherals P1--_CN.srt
9. Demonstration of XIL Drivers--_CN.srt
1. Agenda--.mp4
19. Using GPIO EMIO LED AND BTN P2--.srt
11. Using MIO LED P2--_CN.srt
14. C Code MIO BTN AND LED.html
16. Using GPIO EMIO LED P2--.mp4
7. Fundamentals of XIL Drivers P2--.srt
23. CODE AXI GPIO Single Channel.html
2. Zynq Intro.html
13. Using MIO GPIO Input and Output--.mp4
25. Using AXI GPIO IP Multiple Channels P2--_CN.srt
11. Using MIO LED P2--.mp4
19. Using GPIO EMIO LED AND BTN P2--_CN.srt
11. Using MIO LED P2--.srt
1. Agenda--_CN.srt
5. Ways to Communicate data between PS and Peripherals P2--_CN.srt
4. Ways to Communicate data between PS and Peripherals P1--.mp4
6. Fundamentals of XIL Drivers P1--.srt
25. Using AXI GPIO IP Multiple Channels P2--.mp4
15. Using GPIO EMIO LED P1--.mp4
8. Fundamentals of XIL Drivers P3--.mp4
24. Using AXI GPIO IP Multiple Channels P1--_CN.srt
6. Fundamentals of XIL Drivers P1--_CN.srt
7. Fundamentals of XIL Drivers P2--.mp4
18. Using GPIO EMIO LED AND BTN P1--.mp4
8. Fundamentals of XIL Drivers P3--_CN.srt
18. Using GPIO EMIO LED AND BTN P1--_CN.srt
10. Using MIO LED P1--_CN.srt
19. Using GPIO EMIO LED AND BTN P2--.mp4
9. Demonstration of XIL Drivers--.srt
15. Using GPIO EMIO LED P1--_CN.srt
16. Using GPIO EMIO LED P2--.srt
4. Ways to Communicate data between PS and Peripherals P1--.srt
1. Agenda--.srt
13. Using MIO GPIO Input and Output--.srt
10. Using MIO LED P1--.srt
9. Demonstration of XIL Drivers--.mp4
6. Fundamentals of XIL Drivers P1--.mp4
17. ZYNQ EMIO LED C Code.html
10. Using MIO LED P1--.mp4
26. Code.html
5. Ways to Communicate data between PS and Peripherals P2--.srt
22. Using AXI GPIO IP Single Channel P2--.mp4
21. Using AXI GPIO IP Single Channel P1--.mp4
12. C Code MIO LED.html
20. Code GPIO LED and SWITCH.html
16. Using GPIO EMIO LED P2--_CN.srt
21. Using AXI GPIO IP Single Channel P1--.srt
7. Fundamentals of XIL Drivers P2--_CN.srt
8. Fundamentals of XIL Drivers P3--.srt
15. Using GPIO EMIO LED P1--.srt
24. Using AXI GPIO IP Multiple Channels P1--.srt
13. Using MIO GPIO Input and Output--_CN.srt
18. Using GPIO EMIO LED AND BTN P1--.srt
21. Using AXI GPIO IP Single Channel P1--_CN.srt
22. Using AXI GPIO IP Single Channel P2--.srt
25. Using AXI GPIO IP Multiple Channels P2--.srt
24. Using AXI GPIO IP Multiple Channels P1--.mp4
3. Zynq Peripherals.html
1. Course Link.html
3. Tools used in the course--.mp4
6. Installation Part 2--.mp4
1. Course Framework--.mp4
7.1 Xilinx.lic
10. Adding Digilent Boards and Hardware Connection--.srt
2. Agenda--.srt
8. Adding Licencse--.mp4
5. Installation Part 1--.mp4
9. Digilent Board files Download this before proceeding to the next Video.html
8. Adding Licencse--_CN.srt
5. Installation Part 1--.srt
10. Adding Digilent Boards and Hardware Connection--_CN.srt
4. Recommendation.html
6. Installation Part 2--_CN.srt
1. Course Framework--.srt
3. Tools used in the course--.srt
6. Installation Part 2--.srt
3. Tools used in the course--_CN.srt
5. Installation Part 1--_CN.srt
2. Agenda--.mp4
2. Agenda--_CN.srt
7. Xilinx LIC file.html
8. Adding Licencse--.srt
1. Course Framework--_CN.srt
10. Adding Digilent Boards and Hardware Connection--.mp4
2. Using AXI BRAM with pointers P1--.srt
1. Agenda--.srt
8. Handling DDR to BRAM Transactions--.srt
1. Agenda--_CN.srt
1. Agenda--.mp4
6. Handling DDR Transactions--.mp4
6. Handling DDR Transactions--.srt
4. Understanding XIL_IO Drivers--.mp4
2. Using AXI BRAM with pointers P1--_CN.srt
3. Using AXI BRAM with pointers P2--_CN.srt
4. Understanding XIL_IO Drivers--.srt
5. BRAM RTL Simulation--.srt
8. Handling DDR to BRAM Transactions--.mp4
8. Handling DDR to BRAM Transactions--_CN.srt
6. Handling DDR Transactions--_CN.srt
5. BRAM RTL Simulation--.mp4
3. Using AXI BRAM with pointers P2--.mp4
5. BRAM RTL Simulation--_CN.srt
3. Using AXI BRAM with pointers P2--.srt
7. Code.html
4. Understanding XIL_IO Drivers--_CN.srt
2. Using AXI BRAM with pointers P1--.mp4
1. Agenda--.mp4
7. Fundamentals P3 Board Presets--.srt
5. Fundamental P1 Project Types--.mp4
8. Fundamentals P4 When you need to add IO Constraint--_CN.srt
5. Fundamental P1 Project Types--.srt
12. Fundamentals of SDK P1--_CN.srt
2. Introduction P1--_CN.srt
10. Understanding useful Files added to Project Directory--.srt
10. Understanding useful Files added to Project Directory--_CN.srt
3. Introduction P2--.srt
6. Fundamentals P2 Flow Navigator--.srt
6. Fundamentals P2 Flow Navigator--_CN.srt
13. Fundamentals of SDK P2--_CN.srt
6. Fundamentals P2 Flow Navigator--.mp4
14. Fundamentals of Reporting Mechanism--.mp4
9. Fundantals P5 When you need to add IO Constriaints--.srt
12. Fundamentals of SDK P1--.srt
7. Fundamentals P3 Board Presets--_CN.srt
14. Fundamentals of Reporting Mechanism--.srt
2. Introduction P1--.mp4
5. Fundamental P1 Project Types--_CN.srt
1. Agenda--_CN.srt
4. Code and BD.html
1. Agenda--.srt
13. Fundamentals of SDK P2--.mp4
10. Understanding useful Files added to Project Directory--.mp4
8. Fundamentals P4 When you need to add IO Constraint--.srt
11. How to use TCL Script for BD automation--_CN.srt
7. Fundamentals P3 Board Presets--.mp4
14. Fundamentals of Reporting Mechanism--_CN.srt
12. Fundamentals of SDK P1--.mp4
3. Introduction P2--.mp4
9. Fundantals P5 When you need to add IO Constriaints--_CN.srt
8. Fundamentals P4 When you need to add IO Constraint--.mp4
3. Introduction P2--_CN.srt
13. Fundamentals of SDK P2--.srt
2. Introduction P1--.srt
11. How to use TCL Script for BD automation--.mp4
11. How to use TCL Script for BD automation--.srt
9. Fundantals P5 When you need to add IO Constriaints--.mp4
5. UART with MIO P3--_CN.srt
1. Agenda--_CN.srt
5. UART with MIO P3--.mp4
5. UART with MIO P3--.srt
1. Agenda--.srt
11. EMIO Using AXI UARTLITE P3--_CN.srt
4. UART with MIO P2--.srt
8. EMIO Performing connection to External Hardware PL to UART--.mp4
2. Overview--.srt
11. EMIO Using AXI UARTLITE P3--.mp4
11. EMIO Using AXI UARTLITE P3--.srt
3. UART with MIO P1--_CN.srt
7. MIO Using UART0 and PMOD to extend Capabilities--.mp4
2. Overview--_CN.srt
3. UART with MIO P1--.mp4
10. EMIO Using AXI UARTLITE P2--.mp4
9. EMIO Using AXI UARTLITE P1--.mp4
8. EMIO Performing connection to External Hardware PL to UART--_CN.srt
2. Overview--.mp4
10. EMIO Using AXI UARTLITE P2--.srt
7. MIO Using UART0 and PMOD to extend Capabilities--_CN.srt
10. EMIO Using AXI UARTLITE P2--_CN.srt
8. EMIO Performing connection to External Hardware PL to UART--.srt
1. Agenda--.mp4
4. UART with MIO P2--.mp4
9. EMIO Using AXI UARTLITE P1--.srt
4. UART with MIO P2--_CN.srt
7. MIO Using UART0 and PMOD to extend Capabilities--.srt
6. Code UART MIO.html
9. EMIO Using AXI UARTLITE P1--_CN.srt
3. UART with MIO P1--.srt
8. Using Memory Content Viewer--_CN.srt
11. ILA Using ILA Probe P2--_CN.srt
6. Breakpoint P4--_CN.srt
4. Breakpoint P2--_CN.srt
14. ILA Understanding Communication Protocol P2--.srt
11. ILA Using ILA Probe P2--.srt
11. ILA Using ILA Probe P2--.mp4
13. ILA Understanding Communication Protocol P1--.mp4
9. Using XSCT Console--_CN.srt
9. Using XSCT Console--.srt
5. Breakpoint P3--.mp4
5. Breakpoint P3--.srt
1. Agenda--_CN.srt
8. Using Memory Content Viewer--.srt
7. Breakpoint P5--.srt
4. Breakpoint P2--.srt
7. Breakpoint P5--.mp4
2. Using Serial Window for Debugging--.srt
10. ILA Using ILA Probe P1--.mp4
2. Using Serial Window for Debugging--_CN.srt
4. Breakpoint P2--.mp4
3. Breakpoint P1--.srt
7. Breakpoint P5--_CN.srt
1. Agenda--.srt
8. Using Memory Content Viewer--.mp4
2. Using Serial Window for Debugging--.mp4
14. ILA Understanding Communication Protocol P2--.mp4
15. Code.html
6. Breakpoint P4--.srt
3. Breakpoint P1--_CN.srt
5. Breakpoint P3--_CN.srt
1. Agenda--.mp4
14. ILA Understanding Communication Protocol P2--_CN.srt
13. ILA Understanding Communication Protocol P1--.srt
3. Breakpoint P1--.mp4
6. Breakpoint P4--.mp4
10. ILA Using ILA Probe P1--_CN.srt
13. ILA Understanding Communication Protocol P1--_CN.srt
9. Using XSCT Console--.mp4
10. ILA Using ILA Probe P1--.srt
12. ILA P1.html
1. AP transaction error, DAP status f0000021--.mp4
1. AP transaction error, DAP status f0000021--.srt
2. fatal error xil_printf.h No such file or directory--.srt
2. fatal error xil_printf.h No such file or directory--.mp4
2. fatal error xil_printf.h No such file or directory--_CN.srt
1. AP transaction error, DAP status f0000021--_CN.srt
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